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PD - 95665
IRFP9140NPBF
l l l l l l l
Advanced Process Technology Dynamic dv/dt Rating 175C Operating Temperature P-Channel Fast Switching Fully Avalanche Rated Lead-Free
HEXFET(R) Power MOSFET
D
VDSS = -100V RDS(on) = 0.117
G S
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-247 package is preferred for commercialindustrial applications where higher power levels preclude the use of TO-220 devices. The TO-247 is similar but superior to the earlier TO-218 package because of its isolated mounting hole.
ID = -23A
TO-247AC
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw
Max.
-23 -16 -76 140 0.91 20 430 -11 14 -5.0 -55 to + 175 300 (1.6mm from case ) 10 lbfin (1.1Nm)
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
0.24
Max.
1.1 40
Units
C/W
7/30/04
IRFP9140NPBF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min. -100 -2.0 5.3
Typ. -0.11 15 67 51 51 5.0 13 1300 400 240
Max. Units Conditions V VGS = 0V, ID = -250A V/C Reference to 25C, ID = -1mA 0.117 VGS = -10V, ID = -13A -4.0 V VDS = V GS, ID = -250A S VDS = -50V, ID = 11A -25 VDS = -100V, VGS = 0V A -250 VDS = -80V, VGS = 0V, TJ = 150C 100 VGS = 20V nA -100 VGS = -20V 97 ID = -11A 15 nC VDS = -80V 51 VGS = -10V, See Fig. 6 and 13 VDD = -50V ID = -11A ns RG = 5.1 RD = 4.2, See Fig. 10 D Between lead, 6mm (0.25in.) nH G from package and center of die contact S VGS = 0V pF VDS = -25V = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
I SM
VSD trr Q rr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol -23 showing the A G integral reverse -76 p-n junction diode. S -1.3 V TJ = 25C, IS = -13A, VGS = 0V 150 220 ns TJ = 25C, IF = -11A 830 1200 C di/dt = -100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by Starting TJ = 25C, L = 7.1mH
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%.
Uses IRF9540N data and test conditions
RG = 25, IAS = -11A. (See Figure 12) TJ 175C
ISD -11A, di/dt -470A/s, VDD V(BR)DSS,
IRFP9140NPBF
100
VGS - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTTOM - 4.5V TOP
100
TOP
-ID , Drain-to-Source Current (A)
10
-ID , Drain-to-Source Current (A)
VGS - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTTOM - 4.5V
10
-4.5V 20s PULSE WIDTH TC = 175C
1 10
-4.5V
1 0.1 1
20s PULSE WIDTH Tc = 25C A
10 100
1 0.1
A
100
-V , Drain-to-Source Voltage (V) DS
-V , Drain-to-Source Voltage (V) DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
2.5
TJ = 25C TJ = 175C
R DS(on) , Drain-to-Source On Resistance (Normalized)
I D = -19A
-ID , Drain-to-Source Current (A)
2.0
10
1.5
1.0
1
0.5
0.1 4 5 6 7
VDS = -25V 20s PULSE WIDTH
8 9 10
A
0.0 -60 -40 -20 0 20 40 60
VGS = -10V
80 100 120 140 160 180
A
-VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
IRFP9140NPBF
3000
2500
-VGS , Gate-to-Source Voltage (V)
V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd
20
I D = -11A VDS = -80V VDS = -50V VDS = -20V
16
C, Capacitance (pF)
2000
Ciss
12
1500
Coss
1000
8
Crss
500
4
0 1 10 100
A
0 0 20 40
FOR TEST CIRCUIT SEE FIGURE 13
60 80
A
100
-VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
1000
-ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
10
-I D , Drain Current (A)
100
TJ = 175C TJ = 25C
100s 10 1ms
1
0.1 0.2 0.4 0.6 0.8 1.0 1.2
VGS = 0V
1.4
A
1 1
TC = 25C TJ = 175C Single Pulse
10
10ms
A
100 1000
1.6
-VSD , Source-to-Drain Voltage (V)
-VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
IRFP9140NPBF
25
VDS VGS RG
RD
20
D.U.T.
+
ID , Drain Current (A)
15
-10V
Pulse Width 1 s Duty Factor 0.1 %
10
Fig 10a. Switching Time Test Circuit
5
td(on) tr t d(off) tf
VGS
0 25 50 75 100 125 150 175
10%
TC , Case Temperature ( C)
Fig 9. Maximum Drain Current Vs. Case Temperature
90% VDS
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC)
1 D = 0.50 0.20 0.10 0.1 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 PDM t1 t2
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
-
V DD
IRFP9140NPBF
E AS , Single Pulse Avalanche Energy (mJ)
VDS
L
1200
TOP
1000
RG
D.U.T
IAS
VDD A DRIVER
BOTTOM
ID -4.7A -8.1A -11A
-20V
tp
0.01
800
600
15V
400
Fig 12a. Unclamped Inductive Test Circuit
200
0 25 50 75 100 125 150
A
175
I AS
Starting TJ , Junction Temperature (C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
tp V(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
VG
VGS
-3mA
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
+
QGS
QGD
D.U.T.
-
-10V
VDS
IRFP9140NPBF
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ VDD
*
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[I ]
SD
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For P-Channel HEXFETS
IRFP9140NPBF
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
TO-247AC Part Marking Information
EXAMPLE: T HIS IS AN IRFPE30 WITH AS SEMBLY LOT CODE 5657 AS S EMBLED ON WW 35, 2000 IN THE ASS EMBLY LINE "H"
Note: "P" in assembly line position indicates "Lead-Free"
PART NUMBER INT ERNAT IONAL RECT IF IER LOGO AS S EMBLY LOT CODE
IRF PE30
56 035H 57
DATE CODE YEAR 0 = 2000 WEEK 35 LINE H
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 07/04
Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/

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